C-to-Verilog is a free and open sourced on-line C to Verilog compiler.
You can copy-and-paste your existing C code
and our on-line compiler will synthesize it into optimized verilog.
For additional information on how to use our website to create FPGA designs,
watch the screencast below.
Website screencast
About our service
C-to-Verilog provides a free on-line service which allows
users to compile their existing C code into optimized Verilog code. This code
can be synthesized into an FPGA or ASIC.
C-to-Verilog.com is the result of an academic study in the field of
high-level synthesis at Haifa University by Nadav Rotem.
Our tools enable the development of embedded system-on-chip and integrate with design tools such as Xilinx EDK.
We provide this service to demonstrate our technology.
The implementation of the synthesis system is described
in the research page.
